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Received: by minnie.vk1xwt.ampr.org with NNTP id AA289 ; Sun, 31 Jan 93 14:01:26 EST Newsgroups: comp.unix.bsd Path: sserve!manuel.anu.edu.au!munnari.oz.au!spool.mu.edu!sol.ctr.columbia.edu!hamblin.math.byu.edu!news.byu.edu!ux1!fcom.cc.utah.edu!cs.weber.edu!terry From: terry@cs.weber.edu (A Wizard of Earth C) Subject: Re: reading from parallel port Message-ID: <1993Jan29.172636.14620@fcom.cc.utah.edu> Sender: news@fcom.cc.utah.edu Organization: Weber State University (Ogden, UT) References: <C1ADIM.1s3@sleeper.apana.org.au> <1993Jan26.025455.7032@ucsu.Colorado.EDU> <18212@umd5.umd.edu> Date: Fri, 29 Jan 93 17:26:36 GMT Lines: 52 In article <18212@umd5.umd.edu> mark@roissy.umd.edu (Mark Sienkiewicz) writes: >In article <1993Jan26.025455.7032@ucsu.Colorado.EDU> galbrait@rintintin.Colorado.EDU (GALBRAITH JOHN) writes: >>Also, it could be that some newer lpt cards do have bidirectionality. I >>think the MCA cards do for instance, but I may be wrong. > >I once saw some PC/XT schematics a _long_ time ago. I remember thinking >this: if you drive the output with 0xff, the output drivers will go high and >not fight with the input on the same device. From this, I assume that the >output drivers were open collector, but I'm not sure (maybe was tristate?). >The input and output bits were on the same wire. > >It _looked_ like some hacker thought it would be fun to make that channel >available for input, even though nobody has any input to give it. I've >heard that not all PC parallel ports support it, but apparently several >do. I think by "bidirectionality", he meant an input data latch seperate from the output data latch so that when you read, you got the last value externally latched onto the bus (rather than getting what you wrote back). The general answer to this is "no, that's not supported". I remember when I was young and got my Commodore Pet with the chicklet keyboard (I still have it, and, yes, it still runs fine, even the built in cassette), the big thing was a token-passing nibble network using the parallel ports that we wrote to play our dungeon game. It's amazing what you can do in 8K if you don't assume memory is free. The point being, the I/O was always handled in nibbles. Basically, if every write operation is a read/write, you don't need to turn the port around; the differentiation between nibbles (4:4) and some other number of input/output lines for something like an ethernet adapter is real small, but you could potentially steal 1 bit and do mostly 8-bit to 7-bit conversion on I/O, and check the last bit as "RTS". Generally, I think all PC parallel ports have the "directionality" individually bit programmable -- that's what my technical reference manual says anyway (just like the old 6522), so such gymnastics shouldn't be needed -- although it would reduce the number of transfers for 7 bytes from 14 to 8 if the 7-bit width is used with an RTS for turnaround. Terry Lambert terry@icarus.weber.edu terry_lambert@novell.com --- Any opinions in this posting are my own and not those of my present or previous employers. -- ------------------------------------------------------------------------------- "I have an 8 user poetic license" - me Get the 386bsd FAQ from agate.berkeley.edu:/pub/386BSD/386bsd-0.1/unofficial -------------------------------------------------------------------------------