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Received: by minnie.vk1xwt.ampr.org with NNTP id AA349 ; Sun, 31 Jan 93 14:04:05 EST Xref: sserve comp.unix.bsd:10645 comp.sys.ibm.pc.hardware:42813 Newsgroups: comp.unix.bsd,comp.sys.ibm.pc.hardware Path: sserve!manuel.anu.edu.au!munnari.oz.au!sgiblab!spool.mu.edu!yale.edu!ira.uka.de!Germany.EU.net!horga!agsc!veeble.han.sub.org!gkminix!gero From: gero@gkminix.han.de (Gero Kuhlmann) Subject: Re: Programming the 8259 (and a possible 386bsd bug) References: <1993Jan26.170934.5461@zip.eecs.umich.edu> Organization: gkminix, Hannover, Germany Date: Fri, 29 Jan 93 01:10:44 GMT X-Newsreader: TIN [version 1.1 PL6] Message-ID: <1993Jan29.011044.233@gkminix.han.de> Lines: 90 Dan Muntz (dmuntz@quip.eecs.umich.edu) wrote: > In isa.c in 386bsd the following sequence is used to initialize the "lower" > 8259: > > /* initialize 8259's */ > outb(IO_ICU1, 0x11); /* reset; program device, four bytes */ -->ICW1 > outb(IO_ICU1+1, NRSVIDT); /* starting at this vector index */ -->ICW2 > outb(IO_ICU1+1, 1<<2); /* slave on line 2 */ -->ICW3 > outb(IO_ICU1+1, 1); /* 8086 mode */ -->ICW4 > outb(IO_ICU1+1, 0xff); /* leave interrupts masked */ -->OCW1 > outb(IO_ICU1, 2); /* default to ISR on read */ > > According to the meager amount of information I've found, the last line > should be outb(IO_ICU1, 3); to select ISR on read (or the comment should > say IRR instead of ISR). From other points in the code, it appears that > ISR is expected. If this line is wrong, the other 8259 is also being > initialized incorrectly. Can anyone shed some light on this? Your also wrong :-) The first four out instructions program the so called initialization command words (ICW), numbered from 1 to 4. After ICW4 has been written, the 8259 is ready for normal operation and to accept operation command words (OCW). The following is an excerpt from the data sheet (hope that intel doesn't mind :-) OCW1: A0 D7 D6 D5 D4 D3 D2 D1 D0 1 M7 M6 M5 M4 M3 M2 M1 M0 | | | | | | | | +---+---+---+---+---+---+---+---- Interrupt Mask 1 = Mask Set 0 = Mask Reset OCW2: A0 D7 D6 D5 D4 D3 D2 D1 D0 0 R SL EOI 0 0 L2 L1 L0 | | | | | | | | | +---+---+---- IR Level to be acted upon (0-7) | | | 0 0 1 Non-specific EOI command 0 1 1 Specific EOI command *) 1 0 1 Rotate on Non-specific EOI command 1 0 0 Rotate in Automatic EOI mode (set) 0 0 0 Rotate in Automatic EOI mode (clear) 1 1 1 Rotate on specific EOI command *) 1 1 0 Set priority command *) 0 1 0 no operation *) These commands use L0 - L2 OCW3: A0 D7 D6 D5 D4 D3 D2 D1 D0 0 0 ESMM SMM 0 1 P RR RIS | | | | | | | | +---+----- Read register command | | | 1 0 Read IR on next RD pulse | | | 1 1 Read IS on next RD pulse | | | | | +------------- 1 = Poll command | | +---+------------------------- Special mask mode 1 0 Reset special mask 1 1 Set special mask As you can see, the out instruction you are complaining about actually writes OCW2, which will clear the rotation in automatic EOI mode. Since the 8259 has not been programmed for automatic EOI, this has no effect at all. After initialization the 8259 automatically sets bit 0 of OCW3 to zero, so all reads with A0 = 0 will get the IRR. In order to read the ISR, the value 0x0b has to be written to the 8259 port. That's what I got out of the data sheet. The code you posted doesn't seem to make sense. But since I am not familiar with 386bsd I can't really judge about that. Nevertheless I hope that this is of help for you. gero. i -- Famous remarks are very seldom quoted correctly. - Simeon Strunsky -- Gero Kuhlmann, Hannover 0511/603139 gero@gkminix.han.de