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From: jmonroy@netcom.com (Jesus Monroy Jr)
Subject: [386BSD] Floppy driver and QIC-40/80 support
Message-ID: <1993Feb14.004950.13698@netcom.com>
Keywords: 386bsd device driver fdc floppy QIC-40 QIC-80 tape device
Organization: Netcom - Online Communication Services (408 241-9760 guest)
Date: Sun, 14 Feb 1993 00:49:50 GMT
Lines: 134
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Here is the body to the head which everyone should have gotten.
You can always say you got a little head from me.
-------------------------------------------
[386BSD]:Notes on the fd.c - floppy diskette controller
In a few days code will be post, along with instruction on how
to get a copy and test and test and debug. Most of the new code
has been reworked and redocumented.
What follows is kind-of-a-map or guide:
fd.h used when building(binding or compiling) it tells
the kernal how many devices will available
(This may be eliminated in the future.)
fd1.h basic fdc codes & macros, it also contains
USER_TUNEABLE_PARAMETERS
fd_bsd.h stuff inportant to 386BSD; logical and
syntactical variables
fd.c The body of the code.
See the first 25 lines for "PROBLEMS and NOTES",
also debugging aid switches are included, after
that are the prototypes of all the routines in
the "fd.c" - the prototype order follows the rest
of fd.c code layout.
-------------------
While working on this code I have been fortunate enough to deal
in surplus computer equipment, and as such, had a ready supply
of FD Controllers.
Before I start on the FDC problems here are some common
problems. (these problems plague all device drivers)
BUS - BUS speed varies and some controllers will just not
respond in time. Speeds vary from 4Mhz to 12Mhz, and I
have seen 16 Mhz.
DMA - The DMA is controlled on most system be a seperate clock
which make it run faster for high speed RAM. Some
systems interleave their RAM, which inturn slows down
access, because they wanted to sell the system with
cheaper RAM. (This is actually OK, for us.)
IRQ - is serviced by the 8259 interrupt controller chip, which
unfortunately is not released in time by some drivers,
that are doing dumb things.
ARQ - not acknowledging an IRQ (with and ARQ) in time, causes
some devices to reissue an IRQ, which can now hang the
system as the loop tries to play catch up. This happens
because some drivers assume that an IRQ means something
needs to be done.
IE. Now that the first IRQ is answered the second has
not data, so a driver may now hang the whole system
before timing out, but it may not time out if the
IRQ's are masked off by an unknowning driver.
The same goes for applications.
This may get real messy if the OS (Operating System)
tries to maybe swap out a page to the hard disk while
maybe servicing a serial port (like for a mouse) and a
floppy drive.
So much for Motherboard problems, seems like easy things. HUH!?!
They are not!!
---------------
Now to FDC PROBLEMS
IBM originally designed only two(2) floppy drives to the
system and then later kludged a hard drive. This may not seem
important, but since most FDC makers knew this, they just cut
out the control lines on the card to save on the etching (and
gold). So some FDC's do not support a 3 & 4 drive, but most AT
cards (16-bit) do. To complicate things even more a daisy chain
system with terminated resistors was used. So, if you plan4
devices on the FDC and you don't set the addresses correctly or
forget the resistors you are lost. Still not really messy
enough for most though!! Some drives do not support the drive
door open -line. So that means a timeout is needed, even when
the controller may have the brains to know better.
HAD ENOUGH!! HA!
All drives support a drive nor ready - line. Some controllers
assume a drive to always be ready. Most post-87 controllers no
longer support single sided drives directly. Drive Fault (motor
error) is nto supported on either by some makers.
-
Writing to the Main Status Register(supposedly read-only) of the
FDC will reset the drive and maybe put it in a different mode.
New laptops use lower power FDC's, which turnoff after a certain
amount of default time and require extra time to come on-line.
Some FDC data guides ignore logical devices 2 & 3. Some FDC's
have a transfer rate of 1000Kbps, the same setting on a
different FDC will get you 125Kbps. The FD Disk Change Bit for
the AT is in different registers from FDC to FDC implementation.
--
Sector numbering starts with 1 (one) not 0 (zero). Track and
cylinder get used incorectly in some data guides.
---
TO do a DMA transfer you must:
There is practically no documentation for the Digital
Output Register(aka Drive Control Register)
To activate the drive you must:
1) Enable the "drive" bit
2) Enable the "don't reset the controller" bit
3) Enable the "DMA (Intr) Enable" bit
4) Enable the "motor on" bit
all this is in one register.
Setup the DMA chip (luckily the OS does this).
Setup the command chain:
1) USE "MFM" bit
2) USE "MTM (Multi-Track-Mode)" bit
3) Skip "Deleted address mark"
(not doing this may abort a transfer)
4) OR (|) togther with the Command
the drive-head, the track, the HD(again), the sector,
the sector code(size of sector) , sectors per track,
gap length( no longer used in newer FDC's),
data length(if sector code is 0)