*BSD News Article 24602


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Newsgroups: comp.os.386bsd.development
Path: sserve!newshost.anu.edu.au!munnari.oz.au!constellation!paladin.american.edu!howland.reston.ans.net!noc.near.net!ceylon!genesis!steve2
From: steve2@genesis.nred.ma.us (Steve Gerakines)
Subject: [FreeBSD 1.0R] DMA Problems?
Message-ID: <CHCErs.G5w@genesis.nred.ma.us>
Organization: Genesis Public Access Unix +1 508 664 0149
Date: Wed, 1 Dec 1993 06:16:37 GMT
Lines: 25

I've noticed a little snag while trying to do some DMA writes (device
reading memory) using the floppy controller.  While doing writes things
will go fine as long as the system is idle, but if I run something else
CPU intensive at the same time the transfer is running, I get DMA
over/underrun errors.  This doesn't seem to occur during reads (device
writing memory).  I've done many tests, and I'm able to reproduce the
problem predictibly.  In the middle of the transfer it will abort and
the FDC reports over/underrun.  It really doesn't matter what else runs
along with the transfer to make the problem occur.  Slowing the bus down
only seems to exaggerate the problem.

I guess my first question is, in general what causes over/underrun errors
in the first place?  The device is not busy doing anything BUT the
transfer itself.  My next question would be, since the CPU is not
involved while the transfer is running, how could it affect the transfer
anyway?

I'm not doing anything fancy.  Just using isa_dmastart()/done() and
setting up the fdc for a DMA transfer.  My controller is an UltraStor
24F (EISA) with a 486DX2/50.  If anyone has any suggestions, I sure could
use some now. :-)

Thanks,
- Steve
steve2@genesis.nred.ma.us