*BSD News Article 25731


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From: jmonroy@netcom.com (Jesus Monroy Jr)
Subject: Re: [FreeBSD 1.0R] DMA Problems?
Message-ID: <jmonroyCJB69t.D8B@netcom.com>
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References: <CHCErs.G5w@genesis.nred.ma.us> <2dj25i$1ga@u.cc.utah.edu> <2encotINN3sq@bonnie.sax.de> <2eqjt7$dqm@u.cc.utah.edu> <CI6291.HBA@genesis.nred.ma.us> <2fbvtoINNk71@bonnie.sax.de> <jmonroyCIJFAr.Atn@netcom.com> <2g4kjvINNnsf@bonnie.sax.de> <jmonroyCJ3ts3.1Ls@netcom.com> <2gk4fjINNal@bonnie.sax.de>
Date: Sat, 8 Jan 1994 11:22:40 GMT
Lines: 107

J Wunsch (j@uriah.sax.de) wrote:
: jmonroy@netcom.com (Jesus Monroy Jr) writes:

: >: Yes. But this doesn't prove they do the refresh via an DMA channel zero
: >: request. They simply continue using the timer...
: >:
: >	If this doesn't prove the point please state why.

: You showed the dependance between the timer and the dRAM refresh. But you
: _assumed_ the timer would control DMA channel 0 without proving this. I
: claim this is wrong.
:
	OK. I will say that I have *NOT* proved that DMA 
	channel 0 is controlled exclusively by the timer.

	I have only proved this on my machine (and anyone
	that gets the same results as I).


: >	I am sorry to seem a bit irritated on this but, I 
: >	seem to bring facts and proof.[...]

: If your claim were correct, shutting down the DMA controller would cause
: the dRAM refresh to stop and thus immediately shut down any system.
:
	NO. That is not correct. It would not shut down any system
	immediately.  I stated this in the program (example) and
	I would have hoped that you would have read this.

: Well i simply wrote a ``4''  onto port ``8'', this should disable the
: DMA controller. I can prove it does since the floppy fails after this
: step. But my dRAMs are quite well:-)
:
	Please clarify this. I don't have my data guide in front
	of me so I can not tell what it is your trying to say.

	Please be a bit specific on this.

: >	Blink... what does "all of the modern chipsets" mean?
: >	Does this mean chipsets made after 1992/1991/1990?

: The above test has been made on a NEAT chipset, production time 9038. Just
: to prove it once more, i've tested it on any available DOS box here, some
: 286, some 386, with the same result. (All those boxes are from the early
: 90's.)
:
	OK... what were the results of the "above test"... You
	did not state all the results of your test _nor_ did 
	you state if you had run the tests that I had provided.

: Any piece of documentation that *i* have states that DMA 0 is unused in
: AT-style computers.
:
	Well... at least someone is reading the documentation....
	
	There is some documentation that states that DMA channel 0
	is available. However, the *stuff* that I have does not
	say that the DMA refresh, on channel 0, is disabled.
	
	Channel sharing is available on some designs, from my information.
	Granted, I don't have this information handy, I may have mis-read
	the information, I may be completely wrong, but I don't think so.


: >	And please explain to me why your not reading the Data Guide?
:                                      ^^^^
:                                      you're? Must i teach you English?
:
	You are most welcome at any time to point out my
	vast oversights.

: Which Data Guide? Where should i read it? Why should i read it?
:
	DATA GUIDE:
		any Intel data guide that discusses
		the i8237 (the DMA controller)
		the i8259 (the IRQ controller)
		the i8254 (the PIT (programable Interrupt Timer))

	Where you should read, is listed in the documentation 
	that I listed in the i8254 shutdown test.
	
	Why you should read, is so that you will either tell
	me I'm a complete idiot (by the Data Guide) or
	I'm right.

: I hope i gave you enough ``facts and proof'' now. Please don't waste my
: time anymore.
:
	You gave me no proof and no facts.  If I'm wasting your time
	don't answer.


	-------------------------oOo-------------------------


	As for the true state of channel 0, If you believe
	that the fate of the world rest with the machine 
	that sits on your desk, far be it for me to play
	the devil's advocate.

	It's 3am.. not all words are spelled right.. again.
-- 
Jesus Monroy Jr                                          jmonroy@netcom.com
Zebra Research
/386BSD/device-drivers /fd /qic /clock /documentation
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