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Newsgroups: comp.os.386bsd.development Path: sserve!newshost.anu.edu.au!munnari.oz.au!spool.mu.edu!darwin.sura.net!howland.reston.ans.net!gatech!swrinde!elroy.jpl.nasa.gov!decwrl!netcomsv!netcom.com!jmonroy From: jmonroy@netcom.com (Jesus Monroy Jr) Subject: Re: [FreeBSD 1.0R] DMA Problems? Message-ID: <jmonroyCJss04.ELq@netcom.com> Organization: NETCOM On-line Communication Services (408 241-9760 guest) X-Newsreader: TIN [version 1.2 PL1] References: <CHCErs.G5w@genesis.nred.ma.us> <2dj25i$1ga@u.cc.utah.edu> <2encotINN3sq@bonnie.sax.de> <2eqjt7$dqm@u.cc.utah.edu> <CI6291.HBA@genesis.nred.ma.us> <2fbvtoINNk71@bonnie.sax.de> <jmonroyCIJFAr.Atn@netcom.com> <2g4kjvINNnsf@bonnie.sax.de> <jmonroyCJ3ts3.1Ls@netcom.com> <2gk4fjINNal@bonnie.sax.de> <jmonroyCJB69t.D8B@netcom.com> <2gumo6INNi85@bonnie.sax.de> <jmonroyCJIroC.6AG@netcom.com> <2hdvniINN1mu@bonnie.sax.de> Date: Mon, 17 Jan 1994 23:31:15 GMT Lines: 104 J Wunsch (j@uriah.sax.de) wrote: : jmonroy@netcom.com (Jesus Monroy Jr) writes: : > Can I clear this up by sending you a copy of the : > page in the IBM technical reference where "what I assume" : > is stated? : Though i don't own any IBM box, yes, you can... As long as it ain't more : thant say 20 KB. I'm only uucp-connected and have to pay real money for : each byte. (That's why i hate your indented text. Band width without any : information at all.) : Send me your overland mail address via e-mail. : > OK... in English then, you disabled the controller : > chip, via the Command REgister .. : > the DMA refresh is a psuedo operation. : > meaning that it does not do a read or a write - : btw., it does a read, but throws away the byte read : > - simply a strobe of the address line. : Yes. But it will have to initiate a bus cycle to do this. If i'm disabling : my DMA controller, it cannot initiate anything. So it's irrelevant whether : this is a dummy operation or not. The term ``dummy'' only refers to the : fact here that there is no data transferred. But not to the fact the DMA : would not be needed anymore. If i kill any DMA operation, i would also : kill the dRAM refresh if it were done by DMA. : I not going to argue with you. If you don't have the same or similar documentation _OR_ you can get a hold of any, then we're just blowing in the wind. quibbling on irrelevant terms will not get you anything.... either get the some documentation, prove me wrong (and quote ) it or I won't give you much of a disscussion. I've been over these items with people before, on this newsgroup. If you weren't here at the time, I'm sorry, but I have things to do. : >: I've stated all the results of my test. (DMA fails, but RAMs are okay.) : >: : > No, what you stated were the conclusions of your test. : What else results did you expect? : > I think you're being stubborn or lazy. : The latter, definately. : At this point, you need to look at other people's results. I have been willing to do this. I tried the DMA-controller-shutdown as you mentioned, once before. I was lead to the conclusion that it was "inconclusive", "non-deterministic". If you have another test that is much more conclusive, I would be happy to try it out. However, your present test will be shot down by others (not just me) because of reasons I stated. : >: I can : >: simply stop it with some out's from my debugger. : >: : > I don't think your serious. : Why not? Any good debugger might be much more helpful than tons of code : lines. I would never have completed my old CP/M floppy driver without : extended tests run through a debugger. (The only thing on floppies that : cannot be done by a debugger is sector read/write, since it implies tight : timing conditions. Everything else, up to a READ SECTOR ID can be done : with a debugger.) : I think you have to realize that your in a multi-tasking, multi-processin system. Anything run from a "standard" debugger will produce inconclusive results, because you don't know if another process has priority over you. By "standard" debugger I mean the usual type that spit out a line at a time of Assembly. I'm not competely familiar with the *nix debuggers, but if it's like the reset of the system "I don't expect you can prove anything conclusively". : >: DMA channel 0 is not wired to the IO bus, thus it is only available for : >: mainboard chips (if there are any). : >: : > Wait a minute... here in a previous article you stated : > that some (support) boards can use DMA channel 0!! : Aeh, well, i should have looked into that old magazine... But sorry, i : don't have the time for it, and i think it wouldn't bring us any millimeter : closer to a solution of our DMA overrun problem. : Agreed! : -- Jesus Monroy Jr jmonroy@netcom.com Zebra Research /386BSD/device-drivers /fd /qic /clock /documentation ___________________________________________________________________________