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Newsgroups: comp.os.386bsd.questions Path: sserve!newshost.anu.edu.au!munnari.oz.au!bunyip.cc.uq.oz.au!harbinger.cc.monash.edu.au!msuinfo!agate!howland.reston.ans.net!cs.utexas.edu!uunet!rde!gator!tous!bilver!roadie!knight!chiyoko From: chiyoko@knight.ice.sda.cbis.com (Chiyoko) Subject: 386 VS 286 Message-ID: <1994Apr11.194516.513@roadie.uucp> Sender: usenet@roadie.uucp (USENET id) Reply-To: chiyoko@knight.ice.sda.cbis.com Organization: Cincinnati Bell Information Systems, Inc. Date: Mon, 11 Apr 1994 19:45:16 GMT Lines: 26 I am comparing architechtures among X86s. Could anyone answer the following questions? Do the 286 processors use translation lookaside buffers (TLBs)? What type of write polyicy does a typical 286 processor implement? Are there any references comparing a segmented memory model and a linear flat memory model? Pardon me for the ancient subject but I have not worked on Intel processors before. -- Chiyoko Koike Miklasevich __o o -\<, (|' ~~>--^o' __ (*)/(*) __ `/| __ Cincinnati Bell Information Systems TEL (407) 661-5409 FAX (407) 660-0085 e-mail: chiyoko.miklasevich@cbis.com