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Path: sserve!newshost.anu.edu.au!harbinger.cc.monash.edu.au!msuinfo!agate!spool.mu.edu!heifetz.msen.com!zib-berlin.de!rs1-hrz.uni-duisburg.de!rrz.uni-koeln.de!RRZ.Uni-Koeln.DE!RRZ.Uni-Koeln.DE!news From: se@fileserv1.MI.Uni-Koeln.DE (Stefan Esser) Newsgroups: comp.os.386bsd.bugs Subject: Re: FreeBSD: ASUS SP3G and writeback caches Date: 3 Sep 1994 17:42:19 GMT Organization: Institute of Nuclear Physics, University of Cologne, Germany Lines: 55 Distribution: world Message-ID: <34achrINN2e8p@rs1.rrz.Uni-Koeln.DE> References: <344vevINN2t7j@rs1.rrz.Uni-Koeln.DE> <M47RBQRJ@geminix.in-berlin.de> NNTP-Posting-Host: fileserv1.mi.uni-koeln.de Keywords: FreeBSD In article <M47RBQRJ@geminix.in-berlin.de>, gemini@geminix.in-berlin.de (Uwe Doering) writes: |> se@fileserv1.MI.Uni-Koeln.DE (Stefan Esser) writes: |> |> >Maybe something got broken in going from FreeBSD-1.1 to 1.1.5 ? |> > |> I've seen this problem on an ASUS SP3G with an AHA1542CF controller as |> well (FreeBSD-1.1.5, i486DX2/66 CPU). So I don't think that this is a |> PCI related problem. It's more likely that you need to select `write- |> through' because the current ASUS SP3G doesn't have a Dirty Tag SRAM |> and therefore the secondary cache can't work in `write-back' mode. |> Yes, I know that other MBs work in a pseudo-`write-back' mode even |> without a Dirty Tag SRAM (with reduced performance, of course) but |> apparently the ASUS SP3G doesn't support this mode. Well, how can it possibly not support that mode ??? If there is no dirty tag, then the 82424Z DIRTYQ pin is driven high, representing the 'dirty' state and always forces a write back of each cache line that is updated by bus master accesses or by the CPU after each cache miss. |> So, before concluding that the ASUS SP3G isn't capable of secondary |> cache `write-back' operations I would rather wait until there are ASUS As I wrote in my original article, I know that the ASUS SP3G worked with PCI SCSI and writeback cache. Under FreeBSD-1.1, that is !!! |> SP3G MBs available that are equiped with a Dirty Tag SRAM and then |> check again. Rumor has it that these MBs are already available in I'm not in the market of an ASUS board, I'm trying to find the reason that bus master DMA and writeback don't go together well under FreeBSD-1.1.5 (though they did under 1.1), since I would like the PCI SCSI driver to be supported on the SP3G with WB cache. We got just to many questions why our PCI SCSI driver didn't work on that board ... |> Taiwan at this time so it should be just a matter of weeks until they |> show up on the US and european market. It's a shame, however, that |> they came out w/o a Dirty Tag SRAM in the first place. Yes. All true. But since dirty is always signaled to the Saturn chip set, if there is no dirty tag RAM, I'd not expect that writeback works with that RAM ... -- Stefan Esser Internet: <se@ZPR.Uni-Koeln.DE> Zentrum fuer Paralleles Rechnen Tel: +49 221 4706010 Universitaet zu Koeln FAX: +49 221 4705160 Weyertal 80 50931 Koeln