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Xref: sserve comp.benchmarks:7899 de.comp.os.unix:313 comp.unix.bsd.freebsd.misc:4332 Path: sserve!euryale.cc.adfa.oz.au!newshost.anu.edu.au!harbinger.cc.monash.edu.au!simtel!swidir.switch.ch!scsing.switch.ch!xlink.net!bloom-beacon.mit.edu!news5.ner.bbnplanet.net!news3.near.net!paperboy.wellfleet.com!news-feed-1.peachnet.edu!usenet.eel.ufl.edu!news.mathworks.com!fu-berlin.de!zrz.TU-Berlin.DE!isst.fhg.de!berlin.fhg.de!news.fhg.de!zv.fhg.de!kuehn From: kuehn@sigma2.uucp (Peter Kuehn) Newsgroups: comp.benchmarks,de.comp.os.unix,de.comp.os.linux,comp.unix.bsd.freebsd.misc Subject: Re: Intel Zappa board vs. Asus P55... Date: 10 Aug 1995 14:06:23 GMT Organization: Fraunhofer-Gesellschaft Zentralverwaltung Lines: 47 Message-ID: <40d3ov$l6t@zv.zv.fhg.de> References: <3vvtun$cs@knobel.gun.de> <402lr1$7v8@agate.berkeley.edu> <408gtl$r3m@news.cloud9.net> Reply-To: kuehn@zv.fhg.de NNTP-Posting-Host: sigma2.zv.fhg.de In article <408gtl$r3m@news.cloud9.net>, tls@cloud9.net (Thor Lancelot Simon) writes: |> In article <402lr1$7v8@agate.berkeley.edu>, |> Jordan K. Hubbard <jkh@violet.berkeley.edu> wrote: |> >In article <3vvtun$cs@knobel.gun.de>, |> >Andreas Klemm <andreas@knobel.gun.de> wrote: |> >>I wanted to get an ASUS P55TP4XE board with synchronous |> >>cache memory. My local hardware shop told me, that currently |> >>there is no ASUS board with synchronous (burst) cache available |> >>and the normal Asus board would be relatively expensive. |> > |> >Just get the ASUS P54TP4 board - you'll find it's more than |> >fast enough without the pipeline cache, and you can always |> >retrofit it later. I'm still using an older P54NP4 board |> |> No, you can't. The P54TP4 has soldered sync cache, or socketed async cache |> which cannot be replaced with sync cache. |> |> The P5_5_TP4 has socketed async cache which can be replaced with sync cache. |> > |> >P.S. There's also the memory barrier. ASUS *emasculated* the P5[45]T* |> >line when they removed the extra 2 SIMM sockets, IMHO! :-( We have |> |> They didn't have a whole lot of choice. I don't believe the Triton chipset |> has support for more than 128MB of memory. |> |> >at least one machine we'd like to go to 192MB on, and you can only do |> >that with the P54NP4 boards now.. Sigh.. |> |> You also might not like the performance much. Triton only caches the |> lower 64MB of memory; anything that happens to land in the upper 64MB |> runs just like it would on a machine with no external cache at all. hopefully you are speaking of 256KB external cache? With the 512 KB you should reach the other 64MB ???!!! |> |> |> -- |> Thor Lancelot Simon |> tls@cloud9.net |> |> Somewhere they're meeting on a pinhead, calling you an angel. -- +-----------------------------------------------------------+ | Peter Kuehn * Fraunhofer Gesellschaft * <kuehn@zv.fhg.de> | | Tel. +49-89-1205-614 | +-----------------------------------------------------------+