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From: Bruce Wayne
Subject: How to set the diamond clock ...
Message-ID: <4356bw@gotham.city>
Sender: news@gotham.city
Organization: City of Gotham
Date: Fri, 18 Sep 1992 17:40:00 GMT
Lines: 131
"Hi! - Bruce Wayne."
If you don't care about free software then go on using inferior programs and
so-called operating systems and eventually even pay money for it and ignore
this posting. If you do care and are wondering which SVGA card to buy for
running X Windows on your PC -
DON'T BUY A DIAMOND CARD - THEY DON'T AGREE WITH THE CONCEPT OF FREE SOFTWARE !
They use a proprietary clock synthesizer and claim to hold "trade secrets"
about it. For those who are like me stuck with such a board, this piece of
code might be of interest:
--8<-----------------8<-------------------8<-------------------8<------------
#include <asm_io.h> /* or whatever this might be called on your OS */
#define MISC_IN 0x3CC
#define MISC_OUT 0x3C2
#define CLCKSEL 0x3D4
#define IDXREG 0x3D4
/*system control reg 2 of 86C911: extended clock select lines*/
#define CLCKSEL_IDX 0x42
/* 4 states of ext. clck. sel. lines 0 and 1 for edge-coded protocol */
#define OC(_n_) (CLCKSEL_IDX | ((_n_&3)<<8) | 0x2000)
/* 0x2000 may be omitted for non-interlaced resolutions */
void set_clock(long l) /* must be big enough to hold 24 bit constants below */
{
long bit;
int i;
unsigned char c = inb(MISC_IN);
unsigned char idx = inb(IDXREG);
outw(MISC_IN, OC(3)); /* !!! */
outb(MISC_OUT, c);
for (i=1; i<=6; i++)
{
outw(CLCKSEL, OC(2));
outw(CLCKSEL, OC(3));
}
outw(CLCKSEL, OC(2));
outw(CLCKSEL, OC(0));
outw(CLCKSEL, OC(1));
outw(CLCKSEL, OC(0));
outw(CLCKSEL, OC(1));
for (bit=1<<23; bit; bit>>=1)
if (l & bit)
{
outw(CLCKSEL, OC(1));
outw(CLCKSEL, OC(0));
outw(CLCKSEL, OC(2));
outw(CLCKSEL, OC(3));
}
else
{
outw(CLCKSEL, OC(3));
outw(CLCKSEL, OC(2));
outw(CLCKSEL, OC(0));
outw(CLCKSEL, OC(1));
}
outw(CLCKSEL, OC(3));
outw(CLCKSEL, OC(2));
outw(CLCKSEL, OC(3));
outb(IDXREG, idx);
}
/* The clock is programmed by first writing one of the constants 06 to 19,
* and later one of 01 to 05. BAT_CONST00 looks pretty much like a reset.
*/
#define BAT_CONST00 0x0000A3
#define BAT_CONST01 0x89189E
#define BAT_CONST02 0xCC0596
#define BAT_CONST03 0x0C2DD6
#define BAT_CONST04 0xB824F6
#define BAT_CONST05 0x1411F6
#define BAT_CONST06 0x3D15A2
#define BAT_CONST07 0x350692
#define BAT_CONST08 0xBC2AC2
#define BAT_CONST09 0xC522B2
#define BAT_CONST10 0xBC35A2
#define BAT_CONST11 0xC422B2
#define BAT_CONST12 0x852AF2
#define BAT_CONST13 0x5410C2
#define BAT_CONST14 0x0C3FF2
#define BAT_CONST15 0xD437F2
#define BAT_CONST16 0x3C15A2
#define BAT_CONST17 0xAD1BD2
#define BAT_CONST18 0xAC1BD2
#define BAT_CONST19 0x3427F2
--8<-----------------8<-------------------8<-------------------8<------------
With the above code included you can set the clock for 1024x768i as follows:
1. blank screen , clear DAC mask
2. wait for 3 hsyncs
3. turn sequencer off and fill the palette
4. set MISC register and unlock your SVGA regs
5. set_clock(BAT_CONST13)
6. set SVGA regs, sequencer, CRTC, graphics and attribute controller
7. wait for 2 vsyncs
8. set_clock(BAT_CONST05)
9. wait for 2 vsyncs
10. clear and unblank screen, set DAC mask, lock SVGA regs
You may have to change the addresses / indices if you have a Speedstar 24X -
I bought a Stealth, of course.
"Gentlemen ! Let's broaden our minds ..."
If you're a Diamond employee or work for one of their "dangerous" competitors
you might be interested to hear that there is no need to design a custom
clock synthesizer and make up silly stories about trade secrets: such devices
are quite common in TV and radio equipment, freely available and
well-documented. Most of them are programmable via Inter-IC-Bus (IIC or i^2C
Bus), a standardized protocol and by the way a Philips patent. Philips
doesn't sue people for using it and - they still exist !!!
Well, enough said for now - Alfred is serving lunch. Share the code and enjoy
Bruce
--
"I just want you to do me a favour:
I want you to tell all your friends about me."
"Who are you ???"
"I'm ..."