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Path: euryale.cc.adfa.oz.au!newshost.anu.edu.au!harbinger.cc.monash.edu.au!news.mel.connect.com.au!munnari.OZ.AU!news.hawaii.edu!ames!agate!howland.reston.ans.net!newsfeed.internetmci.com!news.kei.com!nntp.et.byu.edu!news.caldera.com!park.uvsc.edu!usenet From: Terry Lambert <terry@lambert.org> Newsgroups: comp.unix.bsd.freebsd.misc Subject: Re: SMP, how far off... Date: 9 Dec 1995 10:06:53 GMT Organization: Utah Valley State College, Orem, Utah Lines: 47 Message-ID: <4abn3t$pqr@park.uvsc.edu> References: <4a916h$32n@vespucci.iquest.com> NNTP-Posting-Host: hecate.artisoft.com chris@vespucci.iquest.com (Chris Fisher) wrote: ] ] Anyone have a time frame on when SMP may be done on FreeBSD? You probably didn't mean "done", did you? As long as there is a bit to twiddle, it will be a work ing progress. 8-). Patches for the 10/28/94 kernel are on freefall.cdrom.com. If you have a newer kernel, you'll have to wait for those of us who are hacking it to bless it as "won't cause your head to maybe explode in the non-SMP case" before you'll see it in a source tree. ] And if it is still in the planning stages here are some ] of my dream ideas. Low grain parallelism works in -current as of yesterday, with some gross hacks to get it there. [ wish list elided ] The tasking model is by no means decided. The current code does anonymous tasking -- that is, processes are not bound to a particular CPU. This, coupled with modified zone allocation (which ther isn't one of yet) has implications on scalability. In particular, the SVR4/process binding mode in your wish list limits the scheduling algorith, making it much heavier and thus scalable to fewer processors than an anonymous tasking model would allow (ie: the often quotes figure for Intels is 8 processors). There's an engineer in Germany whose company manufatures 32 processor PPC 604 machines. Your task model wouldn't work too well on that machine, and he's interested in helping with a port. 8-). Right now there are people looking at the pros and cons of various SMP architectures very closely in order to get this all sorted out. The emphasis (for me, anyway) is on portability to non-Intel architectures: specifically, PPC, Alpha, and SPARC. Terry Lambert terry@cs.weber.edu --- Any opinions in this posting are my own and not those of my present or previous employers.