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From: d87-mal@blofeld.nada.kth.se (Mats Löfkvist)
Subject: Re: The ultimate 386BSD machine? (FAQ fodder)
In-Reply-To: stripes@pix.com's message of Sat, 10 Oct 1992 13:04:31 GMT
Message-ID: <D87-MAL.92Oct10155622@blofeld.nada.kth.se>
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Organization: Royal Institute of Technology, Stockholm, Sweden
References: <1992Oct8.072512.8700@elroy.jpl.nasa.gov>
<D87-MAL.92Oct9193909@oddjob.nada.kth.se> <BvwpnM.6Bp@pix.com>
Date: Sat, 10 Oct 1992 14:56:22 GMT
Lines: 23
In article <BvwpnM.6Bp@pix.com> stripes@pix.com (Josh Osborne) writes:
I had heard that VL complient cards should run with the VL clocked up to
66Mhz.
>From a summary of the VL bus spec (see biz.zeos.general):
"Interface Speeds
The VL-Bus operates up to 66MHz. Electrical characteristics of the Physical
VL-Bus connector limit the speed of a VL-Bus device operating across the
connector (i.e, an add in board) to 40 MHz. The VL-Bus clock operates at
the same frequency and phase with the CPU clock. CPU's using double speed
clocks (386-type CPUs for example), must divide down the CPU clock before
driving the VL-Bus clock. Systems that dynamically swithc CPU speeds
(such as portables) are supported. The system may also stop the CPU
clock entirely, provided that no DMA activity occurs during the time the
CPU clock is stopped."
_
Mats Lofkvist
d87-mal@nada.kth.se