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Path: euryale.cc.adfa.oz.au!newshost.anu.edu.au!harbinger.cc.monash.edu.au!news.uwa.edu.au!disco.iinet.net.au!news.uoregon.edu!newsfeed.internetmci.com!news.sprintlink.net!new-news.sprintlink.net!wellspring.us.dg.com!macpc1.webo.dg.com!user From: boykin@clariion.com (Joseph Boykin) Newsgroups: comp.sys.intel,comp.os.linux.development,comp.os.386bsd.questions,comp.os.mach Subject: Need help with Pentium Setup Date: Thu, 30 May 1996 10:26:35 -0400 Organization: CLARiiON Advanced Storage Solutions Lines: 95 Message-ID: <boykin-3005961026350001@macpc1.webo.dg.com> NNTP-Posting-Host: macpc1.us.dg.com Xref: euryale.cc.adfa.oz.au comp.sys.intel:77806 comp.os.linux.development:24789 comp.os.386bsd.questions:17634 comp.os.mach:5548 With any luck, we have a stupid bug and I'll be terribly emarassed once you point it out to me, but in the meantime, we're going nuts. We're trying to take a Pentium Pro from real into protected mode, using a flat model. We set up a GDT, load it, modify CR0 to go into protected mode and do a far jump. Either the far jump is executing in the wrong place or we're taking an exception (I'll know this afternoon which), but either way, something is wrong and we can't figure it out. I've looked at the e.g. NetBSD code, code in the Intel books and a few other places, and nothing appears wrong, but obviously, there is! :-) So, do any of you Pentium wizards have any bright ideas? Feel free to embarass me in public -- I can take it, but an email reply is preferred. Thanks in advance for any help you can provide. Joe Boykin CLARiiON Advanced Storage Solutions boykin@clariion.com =================== Here is the code and data. ; Setup for change to protected mode. cli ; Disable interrupts mov ebx,offset tgdt ; Compute gdt base address mov eax,ds ; shl eax,4 ; add eax,ebx ; mov dword ptr [tgdtra],eax ; mov eax,00200002h ; Setup protected mode registers push eax ; popfd ; eflags mov eax,ss ; shl eax,4 ; add eax,0400h ; mov esp,eax ; esp mov ax,0010h ; All non-code registers point to 2nd mov ss,ax ; (really third) GDT entry. mov ds,ax ; ds mov es,ax ; es mov fs,ax ; fs mov ax,cs ; Compute far jump address shl eax,4 ; and store into apstart add eax,offset land ; mov dword ptr [apstart+2],eax; ; Change to protected mode db 66h,67h ; Load the gdt lgdt fword ptr tgdtr ; mov ebx,cr0 ; Set protected or bx,01h ; mov cr0,ebx ; jmp fword ptr [apstart] ; Jump to "land" h1: jmp h1 ; align 64 ; Land here land: mov word ptr [gs:012h],09c42h; Write 'B' to the screen h2: jmp h2 ; ... align 8 ; Far pointer for jump apstart dw 8h ; Code segment selector dd 0 ; Runtime address of "land" align 8 ; gdt descriptor tgdtr dw 0017h ; 32 byte gdt structure tgdtra dd 0 ; gdt base address (run time computed) align 8 ; gdt tgdt dd 0 ; Null entry dd 0 ; dd 0000ffffh ; Code entry dd 00cf9e00h ; Base=0,Limit=4gb-1 dd 0000ffffh ; Data entry dd 00cf9200h ; Base=0,Limit=4gb-1 -- Joseph Boykin Department Manager CLARiiON Advanced Storage Solutions First Vice-President IEEE Computer Society Phone: 508-480-7286 FAX: 508-480-7908 Email: boykin@clariion.com