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Path: euryale.cc.adfa.oz.au!newshost.anu.edu.au!harbinger.cc.monash.edu.au!munnari.OZ.AU!news.ecn.uoknor.edu!news.eng.convex.com!newshost.convex.com!newsgate.duke.edu!news.mathworks.com!uunet!inXS.uu.net!news.artisoft.com!usenet From: Terry Lambert <terry@lambert.org> Newsgroups: comp.unix.bsd.freebsd.misc,comp.unix.bsd.netbsd.misc Subject: Re: Curious about *BSD History Date: Tue, 02 Jul 1996 16:18:14 -0700 Organization: Me Lines: 69 Message-ID: <31D9AE36.3993D656@lambert.org> References: <4k1nue$lm8@orb.direct.ca> <31D0A2C9.72741EA8@lambert.org> <4qs2ag$bg0@pier2.bayarea.net> <31D29460.41C67EA6@inuxs.att.com> <4rbql3$ges@pier2.bayarea.net> <31D9789E.41C67EA6@inuxs.att.com> NNTP-Posting-Host: hecate.artisoft.com Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Mailer: Mozilla 2.01 (X11; I; Linux 1.1.76 i486) Xref: euryale.cc.adfa.oz.au comp.unix.bsd.freebsd.misc:22653 comp.unix.bsd.netbsd.misc:3912 John S. Dyson wrote: [ ... ] ] Tracking the FreeBSD VM system wouldn't be that hard, and porting it ] isn't brain surgery. IMO, the only thing that would keep someone from ] doing it is that it is documented less than the original 4.4 ] stuff is. Actually, the FreeBSD VM scheme is simplified in certain ] areas by removing unneeded cruft (some of it was inspired by ] Hibler's comments.) Complications were added to make it work ] much better. Documentation is one place, but it's not impossible to follow, even for someone with no desire to learn the full ins and outs of the Intel processor. ] We don't do ANY pte manipulations outside of pmap.c (unlike NetBSD). This helps. ] FreeBSD has added optional pmap entry points to support ] microcoded TLB's better. This hurts, I think, in the non-microcoded TLB case (Alpha, PPC). ] We have other LL optimization entry points that are purely ] optional to implement. There is some question about how this is optioned. ] We have done machine dependent optimizations (some of which are ] optional low level routines called from the upper level MI code.) ] For example, we have much better management of page table pages, And this. My comments were not to provoke this kind of discussion. When I'm ready for it, it won't be adversarial, and I'll probably simply talk with John directly instead of making a public spectacle of things. The only reason I'd consider banging an intel model into the soft page mapping is for support in the MP case. The PPC has a number of MP implementations (probably most notably the MEI instead of MESI implementation for dual PPC601's on the BeBox) which simply do not fit well into the usage model for the Intel MP Spec, the baseline for the FreeBSD SMP work. I've had a hard time tracking the rapid VM changes without a scorecard was my only point, and the suggested use of the TSS in the SMP case is what had me up in arms at all. I think this is something that we can just drop (or take to email, though I do not think I'm in a position to benefit fully from such a discussion at this time, and I'd like to delay it, if possible). It's too esoteric for the average reader, and irrelevant to anything but bottom line benchmark results (which are iffy at best) for the rest. Regards, Terry Lambert terry@lambert.org --- Any opinions in this posting are my own and not those of my present or previous employers.