*BSD News Article 74733


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From: jmonroy@wco.com (Jesse Monroy)
Newsgroups: comp.unix.bsd.freebsd.misc
Subject: Re: Who (or what) is Jesus Monroy?
Date: 26 Jul 1996 09:09:00 GMT
Organization: West Coast Online, Inc.
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Terry Lambert (terry@lambert.org) wrote:
: Jesse Monroy wrote:
: ] : Your claim is that it is useless process data already in L1,
: ] : L2, and non-collisively accessed memory (assuming a good
: ] : chipset, or more specifically, a good DMAC), while the I/O
: ] : bus is active for a DMA transfer.
: ]
: ]         Well from a practical  point, DMA, while
: ]         a good idea, seems to be one of these points
: ]         that CISC processor people like to tout.
: ]         I on the other hand don't see this working
: ]         correctly under parallel processors... as you know.
: ] 
: ]         So now we look at the possbility of
: ]         two or more buses.. and should they be
: ]         parallel or  some hybrid of arbitration.
: 
: This assumes that the MP system will not use per processor memory
: pools with zone allocation, instead of primitive SLAB allocation,
: like on Solaris and SVR4 systems (yes, I know the J. Bonwick paper
: postdates most other VM publications).
:
	Don't know this person... 
	so before saying something completely unintelligent.
	let me read up on this.
 
: If you want, you can do your SLAB allocation in a page from a
: given zone; it's pretty much irrelevant, since the issue of
: memory bus arbitration (which seems to be your problem with
: DMA) is taken care of with the per processor pools that are
: refilled-from/drained-to the global pool at sparse intervals
: (Vahalia, "UNIX Internals: The New Frontiers", Chapter 12,
: _Kernel Memory Allocation_, 12.9 _A Hierarchical Allocator
: for Multiprocessors_ **).
:
	A global pool is not a good idea. does not scale. 
: 
: SLAB allocation also tends to fail to perform when its biggest
: excuse is taken away (for instance, when the VM and buffer cache
: have been unified).
: 
	Don't know SLAB yet, sounds like a flat memory model.
	I assume SLAB follows traditional RAS x CAS ideology.
	NOT GOOD.  Even bank switching will bogg... 
	
	The next question might be will shadowing advantage
	the tradditional linear or matrix memory layout.
	from an engineering stand point IT's done.  
	Look at embedded system cira 1960 to 1985.

: 
: SMP/ASMP is not an argument against DMA.  8-).
:
	Never said it was :^)
 
: 
: ] : This is obviously false... you are trolling.  The real Jesus
: ] : Monroy Jr. did not troll.
: ] :
: ] : Foo!  You are nothing but a charleton!
: ] :
: ]         So, you can e-mail me... to see if it really is me..
: 
: 
: 
: OK, maybe it wasn't as obvious as I thought it was.  8-).
: 
: 
: ** McKenney, P.E., and Slingwine, J., "Efficient Kernel Memory
:    Allocation on Shared Memory Multiprocessors," _Proceedings
:    of Winter 1993 Usenix Technical Conference, Jan 1993, pp.
:    295-305
: 
	Stop thinking traditional, these bought into retirement
	the day IBM hired them.....