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From: bde@zeta.org.au (Bruce Evans)
Newsgroups: comp.unix.bsd.freebsd.misc
Subject: Re: 2.1.5-RELEASE sio silo overflows?
Date: 13 Sep 1996 10:13:44 +1000
Organization: Kralizec Dialup Unix
Lines: 56
Message-ID: <51a8vo$nre@godzilla.zeta.org.au>
References: <50i54c$mq7@yama.mcc.ac.uk> <gergDxG5ry.FGo@netcom.com> <512goo$15q@anorak.coverform.lan> <gergDxK0FH.AFp@netcom.com>
NNTP-Posting-Host: godzilla.zeta.org.au
In article <gergDxK0FH.AFp@netcom.com>, Greg Andrews <gerg@netcom.com> wrote:
>brian@awfulhak.demon.co.uk (Brian Somers) writes:
>>Greg Andrews (gerg@netcom.com) wrote:
>>...
>>Ah, but FreeBSD is a multi-user, multitasking OS that doesn't carry much
>>latency at all ! That's why I can drive a 28.8k modem at a DTR of 115200
>>through an 8250 UART :) It must be about a year since I saw my last
>>serial overflow.
>>
>
>Driving the modem isn't the issue. It's *receiving* data at high speeds
>that has trouble with interrupt latencies, not sending data.
The maximum serial interrupt latency in FreeBSD is about 50 usec on
a 386/20 (1) under favourable conditions (no "multiport" (shared IRQ)
support (2), only one active serial port (3), 8250 UART (4), no (broken)
bus-hogging DMA controllers (5), and no user-mode graphics drivers or
other applications that disable interrupts). It has to be that low for
an 8250 to work at 115200 bps on a 386/20.
OTOH, the maximum non-serial interrupt latency on a 386/20 is in the
10-100 msec range. E.g., reading 64K in one block from an MFM disk can
take 40 msec. Some systems don't handle serial interrupts specially and
have a 10-100 msec interrupt latency for all interrupts. There is no
way that the 16 character FIFO on a 16550 can make up for a 200-2000
times larger interrupt latency. It takes a 16 character FIFO and a
Pentium vs a 386 to make up the difference. FreeBSD has some buffering
problems at 115200 bps when the general interrupt latency is larger
than 22 msec, but these show up as (software) buffer overflows, not
hardware (silo) overflows.
(1) About 20 usec for a 486/33; 5-10 usec for a Pentium/133.
(2) Add 2 usec for each port sharing an IRQ.
(3) Add 10 usec for each additional 8250 (worst case is 2 input events,
2 output events and 1 (*) modem status event per interrupt).
(4) Add 60 usec for 16550 instead of 8250 (worst case is 16 input events,
16 output events and 1 (*) modem status event per interrupt).
(5) I've seen 160 usec for a VLB busmastering SCSI controller.
(*) I lied. There may be any number of modem status events per interrupt
if the modem control lines are noisy.
These numbers show that the default FIFO trigger level of 14 is adequate
for one or two 16550 ports on a 486/33 or faster machine, even when the
ports are concurrently saturated doing input, output and flow control
as fast as possible. A pair of 8250's or 16450's works too, but an
8250 mixed with a 16550 is marginal. Other numbers show that more than
about 8 concurrently saturated 16550 ports won't work very well, although
there will be no latency problems provided the trigger level is reduced
to 8 (i/o overheads become too large). However, concurrently saturated
ports are extremely unlikely. Average modem throughputs are usually
much lower than 115200 bps, and concurrent input and output is unusual.
Thus 16 or 32 ports can be expected to work fairly well if the FIFO
trigger level is tuned.
--
Bruce Evans bde@zeta.org.au