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Path: euryale.cc.adfa.oz.au!newshost.carno.net.au!harbinger.cc.monash.edu.au!munnari.OZ.AU!news.ecn.uoknor.edu!feed1.news.erols.com!news.maxwell.syr.edu!newsfeed.nacamar.de!supernews.com!bighorn.accessnv.com!jca From: jca@bighorn.accessnv.com (J.C. Archambeau) Newsgroups: comp.unix.bsd.freebsd.misc Subject: Am5x86/P75 WB caching... Date: 19 Mar 1997 04:59:01 GMT Organization: All USENET -- http://www.SuperNews.com Lines: 16 Message-ID: <5gnrql$2ut@usenet88.supernews.com> NNTP-Posting-Host: bighorn.accessnv.com Cc: questions@freebsd.org X-Newsreader: TIN [version 1.2 PL2] Xref: euryale.cc.adfa.oz.au comp.unix.bsd.freebsd.misc:37277 I just upgraded the CPU in my EISA/VLB motherboard from an i486DX/33 to an AMD Am5x86/P75 (133). FreeBSD (2.2-BETA) properly indentifies the CPU, but it states that the L1 cache is in write through mode at bootup. Does FreeBSD disable write back caching of the Am5x86? If it does, what define or kernel configuration parameter do I need to change? I know that writeback caching is enabled under MS-DOS/Win 3.x since I have noticed a difference with some benchmarking programs when I toggle it from the BIOS advanced chipset options. From just my casual usage of the system, I have yet to find a problem with having write back caching enabled. -- /* | Spam violation - e-mail dumped... ** Internet: jca@accessnv.com | Don't blame me, I didn't vote for Clinton. ** jca@anv.net | Intel is the word for 'errata.' */